Innovating SOI memory devices based on floating-body effects
(2007) Solid-State Electronics — Vol. 51, n° 10, p. 1252-1262 (2007)
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- Scaling considerations of conventional DRAMs lead to recent developments of capacitor-less, single-transistor (1T) DRAM based on the floating-body effects in SOI transistors. Several options (Z-RAM and TTRAM) are reviewed and discussed in terms of operation mechanisms, performance and scaling. We also describe a new concept of 1T-DRAM (named MSDRAM) simple to fabricate, program and read. Its basic mechanism is the meta-stable dip (MSD) hysteresis effect which takes advantage of the coupling between front and back interfaces in SOI transistors. Systematic measurements show that MSDRAMs are suitable for low-power applications as they exhibit negligible off-state current, long retention time and scalability. (C) 2007 Elsevier Ltd. All rights reserved.
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Bawedin, M., Flandre, D., & Cristoloveanu, S. (2007). Innovating SOI memory devices based on floating-body effects. Solid-State Electronics, 51(10), 1252-1262. https://doi.org/10.1016/j.sse.2007.06.024 (Original work published 2007)