Radiation-hard Design for Soi Mos Inverters

Francis, P.;Flandre, Denis;Michel, Caroline;Colinge, Jean-Pierre
(1994) IEEE Transactions on Nuclear Science — Vol. 41, n° 2, p. 402-407 (1994)

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Authors
  • Francis, P.UCLouvain
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  • Author
  • Michel, CarolineUCLouvain
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  • Colinge, Jean-PierreUCLouvain
    Author
Abstract
The total-dose hardness of MOS integrated circuits is usually improved by increasing the hardness of the individual transistors. In this paper, we propose circuit design techniques that can further decrease the sensitivity of cells to radiation dose. This concept is applied to simple cells (inverters) produced in both thin-film SOI and gate-all-around technologies.
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Francis, P., Flandre, D., Michel, C., & Colinge, J.-P. (1994). Radiation-hard Design for Soi Mos Inverters. IEEE Transactions on Nuclear Science, 41(2), 402-407. https://doi.org/10.1109/23.281534 (Original work published 1994)