Graded-channel fully depleted Silicon-On-Insulator nMOSFET for reducing the parasitic bipolar effects
(2000) Solid-State Electronics — Vol. 44, n° 6, p. 917-922 (2000)
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- Abstract
- An extended study of the occurrence of inherent parasitic bipolar effects in conventional and graded-channel fully depleted silicon-on-insulator nMOSFETs is carried out. The graded-channel device is a new asymmetric channel MOSFET, fabricated through a simple process variation. Measurements and two-dimensional simulations are used to demonstrate that the graded-channel device efficiently alleviates the parasitic BJT action, improving the breakdown voltage, by the reduction of impact ionization in the high electric field region. Based on process/device simulation and modeling, multiplication factor and parasitic bipolar gain, which are the responsible parameters for the parasitic BJT action, are investigated separately providing a physical explanation. The abnormal subthreshold slope and hysteresis phenomenon are also studied and compared. (C) 2000 Elsevier Science Ltd. All rights reserved.
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Pavanello, M. A., Flandre, D., & Martino, J. A. (2000). Graded-channel fully depleted Silicon-On-Insulator nMOSFET for reducing the parasitic bipolar effects. Solid-State Electronics, 44(6), 917-922. https://doi.org/10.1016/S0038-1101(00)00032-0 (Original work published 2000)