Problems in designing thin-film accumulation-mode p-channel SOI MOSFET's for CMOS digital circuit environment

(1991) Electronics Letters — Vol. 27, n° 14, p. 1280-1282 (July 4 (1991)

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Abstract
A back-accumulation conduction mechanism ignored in previously-published analyses is shown to be the prime factor in the definition of the threshold voltage of the thin-film accumulation-mode p-channel SOI MOSFET when the device is integrated in a typical digital circuit environment. A new formulation which overcomes this problem is presented, then used to discuss problems of a tradeoff between film doping and threshold voltage as a function of other technological parameters.
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Flandre, D. (1991). Problems in designing thin-film accumulation-mode p-channel SOI MOSFET’s for CMOS digital circuit environment. Electronics Letters, 27(14), 1280-1282 (July 4. https://doi.org/10.1049/el:19910802 (Original work published 1991)