As electronics becomes more mobile, and its uses and applications more widespread, there is an increased need for a low-power yet powerful system to perform a multitude of varied of tasks. Downscaling the supply voltage improves a device’s power usage, but also severely impacts the overall performance. A careful balance must therefore be struck between the needs of the application in terms of processing speed versus power usage. The technique proposed in this paper allows the acceleration of a slow, multi- cycled combinatorial block beyond the performance generally attainable under the system’s supply voltage conditions, by exploiting the effective data-induced performance gain, ie. the fact that the critical path is only triggered for some data. Through the automatic insertion of dedicated transition detectors within the circuitry of the block itself, at the end of virtual ‘timezones’, the progress of the operation underway can be observed and prematurely completed when the data lends itself to it, thereby increasing the operation speed from the worst case towards the average case. Overall, synthesis results show the technique to have a good performance, significantly reducing the time required to complete operations under the tested combinatorial block. While extra design effort may achieve even better performance, this technique allows hassle-free operation acceleration in a fairly automated fashion.