CMOS inverter based on Triple-Gate FinFETs for low power electronics
(2015) 4th International Symposium on Energy Challenges and Mechanics - working on small scales (ECM4) — Location: Aberdeen, Scotland (United Kingdom) (11.August.2015)
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- Abstract
- Silicon-on-Insulator Triple-Gate FinFETs (SOI-TG-FinFETs) have appeared as suitable technology to sustain the downscaling of the CMOS transistors thanks to their superior control of the so-called Short-Channel-Effects (SCE). However, it is well-known that the behavior of those devices is strongly affected by the parasitic parameters, such as series source-drain resistance (Rsd), gate resistance (Rge) and gate fringing capacitances (Cgge). Under this scenario, proper FinFET optimization might follow specific methodologies in order to cover satisfactorily the application needs
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Citations
Tinoco, J. C., Solis, E., Reyes-Barranca, A., Cerdeira, A., & Raskin, J.-P. (2015). CMOS inverter based on Triple-Gate FinFETs for low power electronics. 4th International Symposium on Energy Challenges and Mechanics - working on small scales (ECM4), session 09F, paper # 5-264. https://hdl.handle.net/2078.5/228769