A fast sample and hold charge-sensing circuit for photodiode arrays
Jespers, Paul;Jusseret, C.;Leduc, Y.
(1977) IEEE Journal of Solid State Circuits — Vol. SC-12, n° 3, p. 232-237 (1977)
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Authors
Jespers, PaulUCLouvain
Author
Jusseret, C.
Author
Leduc, Y.
Author
Abstract
An on-chip charge-sensing circuit with a feedback loop has been designed for improving the charge-transfer speed in photodiode arrays. Its large output voltage swing combined with improved speed performances, makes this circuit well-suited for OCR applications, especially low-cost data capture devices. Sample and hold operation can easily be performed without increasing the Si real estate, making parallel output feasible with frame rates of 3 kHz for arrays with 500 pixels. Experimental arrays were built in standard p-channel aluminum-gate technology.
Jespers, P., Jusseret, C., & Leduc, Y. (1977). A fast sample and hold charge-sensing circuit for photodiode arrays. IEEE Journal of Solid State Circuits, SC-12(3), 232-237. https://hdl.handle.net/2078.5/44484 (Original work published 1977)