Influence of gate underlap in AM and IM MuGFETs

Lee, Chi-Woo;Afzalian, Aryan;Dehdashti, Nima;Xiong, Weize;Colinge, Jean-Pierre
(2008) ESSDERC-ESSCIRC 2008 — Location: Edinburgh (UK) (15.September.2008)

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Authors
  • Lee, Chi-WooTyndall National Institute, University of Cork
    Author
  • Afzalian, AryanUCLouvain
    Author
  • Dehdashti, NimaTyndall National Institute, University of Cork
    Author
  • Xiong, WeizeTexas Instruments Inc., Dallas
    Author
  • Colinge, Jean-PierreTyndall National Institute, University of Cork
    Author
Abstract
The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode (AM) devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode (IM) FETs.
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Lee, C.-W., Afzalian, A., Dehdashti, N., Xiong, W., & Colinge, J.-P. (2008). Influence of gate underlap in AM and IM MuGFETs. Proceedings of ESSDERC-ESSCIRC 2008, p. 238-241. https://doi.org/10.1109/ESSDERC.2008.4681742