High-accuracy MOS models for computer-aided design
White, M.H.;Van de Wiele, F.;Lambot, J.-P.
(1980) IEEE Transactions on Electron Devices — Vol. ED-27, n° 5, p. 899-906 (1980)
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Authors
White, M.H.
Author
Van de Wiele, F.
Author
Lambot, J.-P.
Author
Abstract
Presents accurate device models (1-3 percent) to describe the /b I //sub D/-/b V//sub D/ electrical characteristics of surface-channel PMOS transistors in strong inversion, and ion-implanted depletion-mode buried-channel PMOS transistors. The primary emphasis is an accurate description of the transverse carrier mobility with distance and normal electrical field in long-channel structures. The influence of substrate bias on carrier mobility in the surface-channel device is modeled theoretically and verified by experiment. The carrier mobility in the buried-channel devices is constant as determined experimentally with gated-diode /b C/-/b V/ and conductance measurements. The modeling parameters are determined at /b V//sub D/=0 with an automated data-acquisition microprocessor-controlled system. The models are analyzed with a least squares estimation criterion and a high degree of internal consistency is apparent from the statistical significance of the results.
White, M. H., Van de Wiele, F., & Lambot, J.-P. (1980). High-accuracy MOS models for computer-aided design. IEEE Transactions on Electron Devices, ED-27(5), 899-906. https://doi.org/10.1109/T-ED.1980.19954 (Original work published 1980)