The evaluation of side-channel measurement setups and the impact they can have on physical security evaluations is a surprisingly under-discussed topic. In this paper, we initiate a comprehensive study of such setups for embedded software and hardware (FPGA) implementa- tions.We systematically investigate a design space including the choice of the probing method, the clock frequency of the device under test, its sup- ply voltage and the sampling rate of the adversary's oscilloscope. Our re- sults quantify the impact (i.e., the risk of security over-estimations) that suboptimal setups can cause and lead to easy-to-use guidelines for secu- rity evaluators. Despite some of our conclusions are device-dependent, we argue that the proposed methodology and some of the proposed guide- lines are of general interest and could be applied to other setups.
Bellizia, D., Udvarhelyi, B., & Standaert, F.-X. (2021). Towards a Better Understanding of Side-Channel Analysis Measurements Setups. Lecture Notes in Computer Science, 13173, 64-79. https://hdl.handle.net/2078.5/256613 (Original work published 2021)