(1997) Special Section on VLSI Design and CAD Algorithms at the Asia South-Pacific Design Automation Conference (ASP-DAC 97) — Location: MAKUHARI MEESE(Japan) (1997)
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Authors
Ferreira, R.
Author
Trullemans, A.-M.
Author
Zhang, QH
Author
Abstract
We present here the Controlling Value Boolean Matching based on fault analysis. The problem is to match a Boolean function with don't cares on library cells under arbitrary input permutations and/or input-output phase assignments. Most of the library cells can be represented by tree structure circuits. The approach presented here is suitable for these structures and computes the Boolean matching better than the structural matching used in SIS. It can handle library cells with a general topology and reconvergent paths. The benchmark test shows that the Controlling Value Boolean Matching can be as faster as the structural matching used in SIS.
Ferreira, R., Trullemans, A.-M., & Zhang, Q. (1997). The Controlling Value Boolean Matching. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E80A(10), 1749-1755. https://hdl.handle.net/2078.5/143684 (Original work published 1997)