Variable temperature characterization of low-dimensional effects in tri-gate SOI MOSFETs
(2010) Solid-State Electronics — Vol. 54, n° 11, p. 1273-1277 (2010)
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- We report on variable temperature charge transport measurements of tri-gate silicon-on-insulator MOSFETs with fin widths of 11 nm, fin heights of 58 nm and gate lengths ranging from 80 nm to 250 nm. Reproducible inflection points were observed in drain current vs. gate voltage data acquired at low temperature (4–8 K) and low drain bias (0.1 mV), yielding oscillations in the extracted transconductance data which are consistent with formation of a one-dimensional electron gas in the channel. Simulations of the variation in fin potential with gate voltage indicate transport through ∼3 sub-bands per fin at gate overdrive of 100 mV above threshold. Observed multi-peak envelopes in measured transconductance vs. gate voltage data for multiple-fin devices suggest sub-band separations ∼20 mV, in reasonable agreement with simulation results (27–55 mV). The measured conductance per fin at low temperatures (4–6 K) was on the order of the quantum conductance, consistent with diffusive transport through multiple sub-bands. Measured transconductance features were largely reproducible for repeated measurements on a given device, although slight variations could be observed, possibly due to quantum interference or interface charges.
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Barett, C., Lederer, D., Redmond, G., Xiong, C., Colinge, J.-P., & Quinn, A. J. (2010). Variable temperature characterization of low-dimensional effects in tri-gate SOI MOSFETs. Solid-State Electronics, 54(11), 1273-1277. https://doi.org/10.1016/j.sse.2010.05.035 (Original work published 2010)