A high performance SIMD processor for binary image processing

Legat, Jean-Didier;De Muelenaere, P.
(1990) Proceedings of the IEEE 1990 Custom Integrated Circuits Conference (Cat. No.90CH2860-5) — Location: Boston, MA, USA (13.May.1990)

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Authors
  • Legat, Jean-Didierorcid-logoUCLouvain
    Author
  • De Muelenaere, P.
    Author
Abstract
A high-performance single-instruction, multiple-data (SIMD) processor based on a full-custom VLSI chip has been designed for binary image processing applications. This dedicated IC has been fabricated in a 3- mu m NMOS technology and contains 48000 transistors. The architecture of the processor is described, and the chip description, which includes an original organization for both the data path and image memories, is highlighted. The processor is fully operational. It is used in applications like filtering, skeletonization, feature extraction, document processing, and optical character recognition.
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Legat, J.-D., & De Muelenaere, P. (1990). A high performance SIMD processor for binary image processing. Proceedings of the IEEE 1990 Custom Integrated Circuits Conference(Cat. No.90CH2860-5), p. 17.4/1-17.4/4. https://doi.org/10.1109/CICC.1990.124761