Architecture Exploration of a Fixed Point Computation Unit using Precise Timing Spiking Neurons

Mesquida, Thomas;Valentian, Alexandre;Bol, David;beigne, Edith
(2017) 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2017) — Location: Thessanoliki (Greece) (25.September.2017)

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Authors
  • Mesquida, Thomas
    Author
  • Valentian, Alexandre
    Author
  • Bol, Davidorcid-logoUCLouvain
    Author
  • beigne, Edith
    Author
Abstract
In this paper, we discuss the architecture exploration of a Neuromorphic Signal Processing Integrated Circuit using Precise Timing. This device is intended to fulfill the role of a Digital Signal Processor in the spiking domain, becoming an essential tool to Spiking Neuromorphic Sensors such as Dynamic Vision Sensors. Our approach is based on the use of Spiking Neural Networks with preset topology and weights in order to implement basic arithmetic and signal processing functions using the timing of spikes to convey information. The neural operators are made using Integrate and Fire neurons using four different types of synapses to implement flexible Fixed Point operations. The proposed architecture supporting this application is composed of synchronous clusters of neurons served by an Asynchronous Network on Chip in order to take advantage of the networks particularities. We demonstrate here our thought process, starting with the requirements generated by the developed topologies which lead our way through the architecture exploration.
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Mesquida, T., Valentian, A., Bol, D., & beigne, E. (2017). Architecture Exploration of a Fixed Point Computation Unit using Precise Timing Spiking Neurons. Proceedings of the 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2017), p. 8. https://hdl.handle.net/2078.5/253421