Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applications

Si Moussa, Mehdi;Pavageau, Christophe;Lederer, Dimitri;Picheta, L.;Vanhoenacker-Janvier, Danielle;et.al.
(2006) Solid-State Electronics — Vol. 50, n° 11-12, p. 1822-1827 (2006)

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Authors
  • Si Moussa, MehdiUCLouvain
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  • Pavageau, Christophe
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  • Picheta, L.
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  • Vanhoenacker-Janvier, DanielleUCLouvain
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Abstract
Practical application of integrated circuits requires operation over a wide temperature range. In the case of microwave monolithic integrated circuits (MMICs), the quality of the interconnections as well as the passive matching networks in term of losses is predominent. Therefore, there is a need to investigate the performances of transmission line structures on Si-based substrates in a wide temperature range, as a function of frequency. The behaviour of 50 Ω thin film microstrip (TFMS) and coplanar waveguide (CPW) transmission line topologies on both standard and high resistivity silicon-on-insulator (SOI) substrates versus high temperature is presented.
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Citations

Si Moussa, M., Pavageau, C., Lederer, D., Picheta, L., Danneville, F., Raskin, J.-P., Fel, N., Russat, J., & Vanhoenacker-Janvier, D. (2006). Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applications. Solid-State Electronics, 50(11-12), 1822-1827. https://doi.org/10.1016/j.sse.2006.10.008 (Original work published 2006)