An investigation of high temperature effects on CPW and MSL on SOI substrate for RF applications
(2006) Solid-State Electronics — Vol. 50, n° 12, p. 1822-1827 (2006)
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- Abstract
- One of the main markets for Silicon-onInsulator (SOI) devices is the high-temperature applications. In the last decade, the technology advances to deep submicron to improve device performances in term of cut-off frequency. Practical application of integrated circuits requires the consideration of a wide temperature range, and transmission lines are widely used in MMIC's as interconnects and matching networks. Therefore, there is a need to investigate the performances of the transmission line structures on SOI substrate in a wide temperature range, as a function of frequency. The behaviour of 50 Ω microstrip (MSL) and coplanar waveguide (CPW) transmission line topologies versus temperature is presented.
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Citations
Si Moussa, M., Pavageau, C., Lederer, D., Picheta, L., Danneville, F., Raskin, J.-P., Fel, N., Russat, J., & Vanhoenacker-Janvier, D. (2006). An investigation of high temperature effects on CPW and MSL on SOI substrate for RF applications. Solid-State Electronics, 50(12), 1822-1827. https://hdl.handle.net/2078.5/168306 (Original work published 2006)