Low Temperature Implementation of Dopant-Segregated Band-edge Metallic S/D junctions in Thin-Body SOI p-MOSFETs

Larrieu, G.;Dubois, E.;Valentin, R.;Breil, N.;Pesant, J-C.;et.al.
(2007) IEEE International Electron Devices Meeting - IEDM 2007 — Location: Washington, DC, USA (10.December.2007)

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  • Larrieu, G.IEMN, Villeneuve d'Ascq, France
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  • Dubois, E.IEMN, Villeneuve d'Ascq, France
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  • Valentin, R.IEMN, Villeneuve d'Ascq, France
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  • Breil, N.IEMN, Villeneuve d'Ascq, France
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  • Author
  • Pesant, J-C.IEMN, Villeneuve d'Ascq, France
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Abstract
This paper proposes the implementation of a dopant segregated band-edge silicide using implantation-to-silicide and low temperature activation (500degC). The integration of platinum silicide coupled to boron segregation demonstrates a 50% enhancement of the current drive over the dopant-free approach. RF characterization unveils a cut-off frequency fT of 180 GHz at Lg=30 nm without application of channel stressors.
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Larrieu, G., Dubois, E., Valentin, R., Breil, N., Danneville, F., Dambrinne, G., Raskin, J.-P., & Pesant, J.-C. (2007). Low Temperature Implementation of Dopant-Segregated Band-edge Metallic S/D junctions in Thin-Body SOI p-MOSFETs. Proceedings of the IEEE International Electron Devices Meeting - IEDM 2007, pp. 147-150. https://doi.org/10.1109/IEDM.2007.4418886