Masking is a systematic countermeasure to achieve side-channel security for cryptographic algorithms. However, its secure implementation relies on an independence assumption that can be violated by signal coupling. It has been established that coupling induced within a device can be detrimental. It was demonstrated on a 1 st-order secure design (i.e., with two shares) that an adversary who can manipulate the design’s powermeasurement setup can externally induce significant coupling. It can thus concretely reduce the “effective-security-order”, i.e., make 1 st-order leakages as significant as 2 nd-order ones with fewer measurements. This paper explores the impact of such external amplification phenomena on fabricated hardware test cases for the first time. We designed a dedicated ASIC to extend the empirical results for demonstrating impact up to the 4 th order. We have systematically evaluated factors related to adversarial control, e.g., the external measurement resistance. We also investigated their relative influence compared to intra-design ones, i.e., internal power-grid resistance and transistors’ inherent resistance. Our study demonstrates that externally amplified coupling scales up to concrete masked hardware designs with various amounts of shares and is not very sensitive to intra-design parameters. Therefore, providing experimental evidence that such coupling should be considered during masking validation.
Gur, O., Gross, T., Bellizia, D., Standaert, F.-X., & Levi, I. (2023). An In-Depth Evaluation of Externally Amplified Coupling (EAC) Attacks — a Concrete Threat for Masked Cryptographic Implementations. IEEE Transactions on Circuits and Systems, 70(2), 783-796. https://doi.org/10.1109/TCSI.2022.3222176 (Original work published 2023)