High resistivity SOI substrates: how high should we go?
(2003) 2003 IEEE International SOI Conference. Proceedings — Location: Newport Beach, CA, USA (29.September.2003)
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- Abstract
- For planar RF structures made on oxidized High Resistivity (HR) Si substrates, it is fundamental to keep the resistivity near the SiO/sub 2 //HR Si interface as high as possible. This paper presents a quantitative analysis of the influence of interface states at the SiO /sub 2//Si contact on the substrate resistivity. The starting materials for this study are raw HR substrates before or after SOI bonding process. These HR Si wafers were fabricated with either a Low (LIO) or a High Interstitial Oxygen (HIO) concentration.
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Lederer, D., Desrumeaux, C., Brunier, F., & Raskin, J.-P. (2003). High resistivity SOI substrates: how high should we go? 2003 IEEE International SOI Conference. Proceedings (Cat. No.03CH37443), p. 50-51. https://hdl.handle.net/2078.5/231161