Transmission electron microscopy characterization of the erbium silicide formation process using a Pt/Er stack on a silicon-on-insulator substrate
(2006) Journal of Microscopy — Vol. 224, p. 38-41 (2006)
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- Abstract
- Very thin erbium silicide layers have been used as source and drain contacts to n-type Si in low Schottky barrier MOSFETs on silicon-on-insulator substrates. Erbium silicide is formed by a solid-state reaction between the metal and silicon during annealing. The influence of annealing temperature (450 degrees C, 525 degrees C and 600 degrees C) on the formation of an erbium silicide layer in the Pt/Er/Si/SiO2/Si structure was analysed by means of cross-sectional transmission electron microscopy. The Si grains/interlayer formed at the interface and the presence of Si grains within the Er-related layer constitute proof that Si reacts with Er in the presence of a Pt top layer in the temperature range 450-600 degrees C. The process of silicide formation in the Pt/Er/Si structure differs from that in the Er/Si structure. At 600 degrees C, the Pt top layer vanishes and a (Pt-Er)Si-x system is formed.
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Laszcz, A., Katcki, J., Ratajczak, J., Tang, X., & Dubois, E. (2006). Transmission electron microscopy characterization of the erbium silicide formation process using a Pt/Er stack on a silicon-on-insulator substrate. Journal of Microscopy, 224, 38-41. https://doi.org/10.1111/j.1365-2818.2006.01653.x (Original work published 2006)