FilesZhang.pdf Restricted Access Adobe PDF6.16 MBNo accessDetailsAuthorsZhang, QinhaiUCLouvainauthorSupervisorsTrullemans, CharlesAffiliationsUCLouvainFSA - Faculté des sciences appliquéesShow moreCitations APA Chicago FWB Zhang, Q. (1995). Logic verification and design error diagnosis for combinational circuits. https://hdl.handle.net/2078.5/58754