What are the limiting parameters of deep-submicron MOSFETs for high frequency applications?

Dambrine, G.;Raynaud, C.;Lederer, Dimitri;Dehan, Morin;Raskin, Jean-Pierre;et.al.
(2003) IEEE Electron Device Letters — Vol. 24, n° 3, p. 189-191 (2003)

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Abstract
Parameters limiting the improvement of high frequency characteristics for deep submicron MOSFETs with the downscaling process of the channel gate length are analyzed experimentally and analytically. It is demonstrated that for MOSFETs with optimized source, drain and gate access, the degradation of the maximum oscillation frequency is mainly related to the increase of the parasitic feedback gate-to-drain capacitance and output conductance with the physical channel length, reduction. Optimization of these internal parameters is needed to further improve the high frequency performance of ultra deep submicron MOSFETs.
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Dambrine, G., Raynaud, C., Lederer, D., Dehan, M., Rozeaux, O., Vanmackelberg, M., Danneville, F., Lepilliet, S., & Raskin, J.-P. (2003). What are the limiting parameters of deep-submicron MOSFETs for high frequency applications? IEEE Electron Device Letters, 24(3), 189-191. https://doi.org/10.1109/LED.2003.809525 (Original work published 2003)