A methodology to simulate soft error transients from technology to circuits in bulk and SOI CMOS
(2008) Topical day on “Radiation Tolerance: Instrumentation : from Transistor to Integrated Circuit” — Location: SCK-CEN, Mol (Belgium) (18.March.2008)
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Flandre, D. (2008). A methodology to simulate soft error transients from technology to circuits in bulk and SOI CMOS. Topical day on “Radiation Tolerance: Instrumentation : from Transistor to Integrated Circuit”, SCK-CEN, Mol (Belgium). https://hdl.handle.net/2078.5/222198