Comparative Analysis of Redundancy Schemes for Soft-Error Detection in Low-Cost Space Applications

Frenkel, Charlotte;Legat, Jean-Didier;Bol, David
(2016) 2016 IFIP/IEEE International Conference on Very large Scale Integration (VLSI-SoC) — Location: Tallinn (Estonia) (26.September.2016)

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Authors
  • Frenkel, CharlotteUCLouvain
    Author
  • Legat, Jean-Didierorcid-logoUCLouvain
    Author
  • Bol, Davidorcid-logoUCLouvain
    Author
Abstract
Single-Event Effects are an increasingly important issue in electronic circuits due to technology scaling, efficient error detection schemes are thus required for circuits dedicated to radiative environments, such as in space applications. This work shows that the widespread spatial and temporal redundancy schemes exhibit widely different performances depending on technology, environment and circuit architecture parameters. Following these results, three new redundancy schemes are proposed and compared: one of them, the Forward Temporal Redundancy, stands out as it achieves full error detection with limited timing penalty at only 100% sequential and 45% combinational overheads for a benchmark pipelined MIPS microprocessor.
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Citations

Frenkel, C., Legat, J.-D., & Bol, D. (2016). Comparative Analysis of Redundancy Schemes for Soft-Error Detection in Low-Cost Space Applications. Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI/SoC). Published. 2016 IFIP/IEEE International Conference on Very large Scale Integration (VLSI-SoC), Tallinn (Estonia). https://doi.org/10.1109/VLSI-SoC.2016.7753573