A Systematic Approach to the Side-Channel Analysis of ECC Implementations with Worst-Case Horizontal Attacks

Poussier, Romain;Zhou, Yuanyuan;Standaert, François-Xavier
(2017) 19th International Conference on Cryptographic Hardware and Embedded Systems (CHES 2017) — Location: Taipei (Taiwan) (25.September.2017)

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The wide number and variety of side-channel attacks against scalar multiplication algorithms makes their security evaluations complex, in particular in case of time constraints making exhaustive analyses impossible. In this paper, we present a systematic way to evaluate the security of such implementations against horizontal attacks. As horizontal attacks allow extracting most of the information in the leakage traces of scalar multiplications, they are suitable to avoid risks of overestimated security levels. For this purpose, we additionally propose to use linear regression in order to accurately characterize the leakage function and therefore approach worst-case security evaluations. We then show how to apply our tools in the contexts of ECDSA and ECDH implementations, and validate them against two targets: a Cortex-M4 and a Cortex-A8 micro-controllers.
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Poussier, R., Zhou, Y., & Standaert, F.-X. (2017). A Systematic Approach to the Side-Channel Analysis of ECC Implementations with Worst-Case Horizontal Attacks. In Wieland Fischer, Naofumi Homma (ed.), Proceedings of the 19th International Conference on Cryptographic Hardware and Embedded Systems (CHES 2017) (p. p. 534-554). Springer. https://doi.org/10.1007/978-3-319-66787-4_26