Pre-Silicon 22/20 nm Compact MOSFET Models for Bulk vs. FD SOI Low-Power Circuit Benchmarks

Bol, David;Bernard, Sébastien;Flandre, Denis
(2011) IEEE International SOI Conference (SOI 2011) — Location: Tempe (USA) (3.October.2011)

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Abstract
The pre-silicon 22/20nm LSTP models we generated are available on-line1 and can be used for fair bulk vs. FD SOI benchmarks. The proposed modeling methodology unified for bulk and FD SOI can further be used to generate models for LOP process flavor and/or 16nm CMOS node.
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Bol, D., Bernard, S., & Flandre, D. (2011). Pre-Silicon 22/20 nm Compact MOSFET Models for Bulk vs. FD SOI Low-Power Circuit Benchmarks. Proceedings of the IEEE International SOI Conference (SOI 2011). IEEE International SOI Conference (SOI 2011), Tempe (USA). https://doi.org/10.1109/SOI.2011.6081697