Analog and RF analysis of gate-all-around silicon nanowire MOSFET
(2017) 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon – ULIS — Location: Athens, Greece (3.April.2017)
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- Abstract
- Gate all around (GAA) nanowire MOSFETs with gate length of 130 nm were fabricated on SOI wafers. The analog performance was analyzed in terms of transconductance, output conductance, voltage gain, Early voltage and transconductance efficiency. The RF characterization showed relatively low cutoff frequency and maximum oscillation frequency. Small-signal parameters are extracted using cold FET method combined with an optimization procedure called Artificial Bee Colony (ABC) method. It proves that large parasitic capacitance and high RF output conductance are the main reasons for the degraded RF performance.
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Liu, L., Han, Q., Makovejev, S., Trellenkamp, S., Raskin, J.-P., Manti, S., & Zhao, Q.-T. (2017). Analog and RF analysis of gate-all-around silicon nanowire MOSFET. Proceedings of 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon – ULIS, p. Poster # 8. https://doi.org/10.1109/ULIS.2017.7962575