In this paper, the design and the results of two CMOS silicon-on-insulator (SOI) distributed amplifiers (DA) are presented. Partially-depleted SOI process using microstrip lines, and floating-body (FB) transistors are considered. The measured gain is around 4.5 dB with a 0.4-30 GHz bandwidth for the common source DA (CSDA) and around 7 dB with a 0.4-26 GHz bandwidth for the cascode DA (CDA). The optimized performances were found for 1.4 V supply voltage, which corresponds to a DC power consumption of 66 and 55 mW for the CSDA and the CDA, respectively. The CSDA circuit has been extended to design a distributed oscillator (DO) at 12 GHz, and CDA to a cascaded CDA with a cut-off frequency of 48 GHz and 8 dB gain.
Si Moussa, M., Pavageau, C., Picheta, L., Danneville, F., Russat, J., Fel, N., Raskin, J.-P., & Vanhoenacker-Janvier, D. (2006). Design of distributed amplifiers and oscillators in 130 nm SOI MOS technology. In Drayton, R.F.; (ed.), 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RFSystems (IEEE Cat. No.06EX1204) (p. 4 pp.). IEEE. https://hdl.handle.net/2078.5/230909