A high density CMOS inverter with stacked transistors
(1981) IEEE Electron Device Letters — Vol. EDL-2, n° 10, p. 250-251 (1981)
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- Authors
- Abstract
- Describes a complete CMOS inverter, whose P-channel transistor is made from laser annealed polycrystalline silicon and is superimposed upon the N-channel transistor. The single gate is common to both transistors. The process is NMOS compatible and polysilicon transistors with channel lengths down to 4 micron have been made.
- Affiliations
Citations
Colinge, J. P., & Demoulin, E. (1981). A high density CMOS inverter with stacked transistors. IEEE Electron Device Letters, EDL-2(10), 250-251. https://doi.org/10.1109/EDL.1981.25421 (Original work published 1981)