An overview of power analysis attacks against field programmable gate arrays
(2006) Proceedings of the IEEE —
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- Abstract
- Since their introduction by Kocher in 1998, power analysis attacks have attracted significant attention within the cryptographic community. While early works in the field mainly threatened the security of smart cards and simple processors, several recent publications have shown the vulnerability of hardware implementations as well. In particular field programmable gate arrays art attractive options for hardware implementation of encryption algorithms, but their security against power analysis is a serious concern, as we discuss in this paper. For this purpose, we present recent results Of attacks attempted against standard encryption algorithms, provide a theoretical estimation of these attacks based on simple statistical parameters and evaluate the cost and security, of different possible counter measures.
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Standaert, F.-X., Quisquater, J.-J., Peeters, E., & Rouvroy, G. (2006). An overview of power analysis attacks against field programmable gate arrays. Proceedings of the IEEE. https://doi.org/10.1109/JPROC.2005.862437