A 2.4-GHz Fully Integrated ESD-Protected Low-Noise Amplifier in 130-nm PD SOI CMOS Technology
(2007) IEEE Transactions on Microwave Theory and Techniques — Vol. 55, n° 12, p. 2822-2831 (2007)
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- Abstract
- This paper reviews and analyzes a fully integrated electrostatic discharge (ESD)-protected low-noise amplifier (LNA) for low-power and narrowband applications using a cascode inductive source degeneration topology, designed and fabricated in 130-nm CMOS silicon-on-insulator technology. The designed LNA shows 13-dB power gain at 2.4 GHz with a noise figure of 3.6 dB and input return loss of -13 dB for power consumption of 6.5 mW. An on-chip "plug-and-play" ESD protection strategy based on diodes and a power clamp is used at the input and output of the LNA, and has an ESD protection level up to 0.8-, 0.9-, and 1.4-A transmission line pulse current. This corresponds to 1.2-, 1.4-, and 2-kV human body model stress applied at, respectively, the RF input, RF output, and VDD bus. Measurement shows a minor RF performance degradation by adding the protection diodes.
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El Kaamouchi, M., Si Moussa, M., Delatte, P., Wybo, G., Bens, A., Raskin, J.-P., & Vanhoenacker-Janvier, D. (2007). A 2.4-GHz Fully Integrated ESD-Protected Low-Noise Amplifier in 130-nm PD SOI CMOS Technology. IEEE Transactions on Microwave Theory and Techniques, 55(12), 2822-2831. https://doi.org/10.1109/TMTT.2007.909148 (Original work published 2007)