High-Temperature Performance of Silicon Junctionless MOSFETs

Lee, Chi-Woo;Borne, Adrien;Ferain, Isabelle;Afzalian, Aryan;Colinge, Jean-Pierre;et.al.
(2010) IEEE Transactions on Electron Devices — Vol. 57, n° 03, p. 620-625 (2010)

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Authors
  • Lee, Chi-WooTyndall National Institute, University of Cork
    Author
  • Borne, AdrienINPG, Grenoble
    Author
  • Ferain, IsabelleTyndall National Institute, University of Cork
    Author
  • Afzalian, AryanUCLouvain
    Author
  • Colinge, Jean-PierreTyndall National Institute, University of Cork
    Author
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Abstract
This paper investigates the temperature dependence of the main electrical parameters of junctionless (JL) silicon nanowire transistors. Direct comparison is made to silicon nanowire (trigate) MOSFETs. Variation of parameters such as threshold voltage and ON–OFF current characteristics is analyzed. The JL silicon nanowire FET has a lager variation of threshold voltage with temperature than the standard inversion- and accumulation-mode FETs. Unlike in classical devices, the drain current of JL FETs increases when temperature is increased.
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Lee, C.-W., Borne, A., Ferain, I., Afzalian, A., Yan, R., Dehdashti, N., & Colinge, J.-P. (2010). High-Temperature Performance of Silicon Junctionless MOSFETs. IEEE Transactions on Electron Devices, 57(03), 620-625. https://doi.org/10.1109/TED.2009.2039093 (Original work published 2010)