A DeltaVT 0.2V to 1V 0.01mm2 9.7nW Voltage Reference in 65nm LP/GP CMOS

de Streel, Guerric;De Vos, Julien;Bol, David
(2015) IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S 2015) — Location: Rohnert Park, California (USA) (5.October.2015)

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Authors
  • de Streel, GuerricUCLouvain
    Author
  • De Vos, Juliene-peas, Belgium
    Author
  • Bol, Davidorcid-logoUCLouvain
    Author
Abstract
Ultra-Low-Voltage (ULV) System-on-a-Chips (SoCs) are a growing research interest to fullfil the energy efficiency requirements of the wireless sensor node applications featuring sleep power below 1μW. ULP mixed-signal SoCs require a voltage reference robust to temperature, supply voltage and process variations. We propose a 9.7nW voltage reference based on a DVT architecture in 65nm LP/GP CMOS. Silicon measurements demonstrate functionality down to a record breaking 0.2V supply voltage.
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de Streel, G., De Vos, J., & Bol, D. (2015). A DeltaVT 0.2V to 1V 0.01mm2 9.7nW Voltage Reference in 65nm LP/GP CMOS. Proceedings of S3S 2015, 2. https://hdl.handle.net/2078.5/253194