Neural networks for high-storage content-addressable memories: VLSI circuit and learning algorithm
(1989) IEEE Journal of Solid State Circuits — Vol. 24, n° 3, p. 562-569 (1989)
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- Abstract
- Neural networks used as content-addressable memories show unequaled retrieval and speed capabilities in problems srreh as vision and pattern recognition. We propose a new implementation of a VLSI fully interconnected neural network with only two binary memory points per synapse. The small area of single synaptic cells allows implementation of neural networks with hundreds of neurons. Classical learning algorithms like the Hebb’s rule show a poor storage capacity, especially in VLSI neural networks where the range of the synapse weights is limited by the number of memory points contained in each connectiorq we propose a new algorithm for programming a Hopfield neuraf network as a high-storage content-addressable memory. The storage capacity obtained with this algorithm is very promising for pattern recognition applications.
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Verleysen, M., Sirletti, B., Vandemeulebroecke, A., & Jespers, P. (1989). Neural networks for high-storage content-addressable memories: VLSI circuit and learning algorithm. IEEE Journal of Solid State Circuits, 24(3), 562-569. https://doi.org/10.1109/4.32008 (Original work published 1989)