Digital substrate noise coupling into trap-rich HR-SOI substrate
(2013) Ninth Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits – EuroSOI’13 — Location: Paris (France) (21.January.2013)
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- Abstract
- The influence of substrate noise coupling on the RF performance of FD SOI MOSFET built on top of commercial high-resistivity (HR)-SOI and trap-rich (TR)-SOI substrates is investigated when a digital noise signal is injected in the vicinity of the transistors. A crosstalk reduction of more than 20 dBm is achieved with TR-SOI substrate when noise frequency varies from 500 kHz to 50 MHz.
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Citations
Ben Ali, K., Roda Neve, C., Gharsallah, A., & Raskin, J.-P. (2013). Digital substrate noise coupling into trap-rich HR-SOI substrate. Proceedings of the Ninth Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits – EuroSOI’13, paper # 16. https://hdl.handle.net/2078.5/228584