FPGAs as cryptanalytic tools
(2002) 11th IEEE Mediterranean Electrotechnical Conference — Location: Cairo, Egypt (7.May.2002)
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- Abstract
- This paper presents FPGA implementations of two cryptanalytic attacks against DES. Linear cryptanalysis results from Matsui's (1994) work but could not be applied as such and had to be modified to face hardware constraints. We broke a key in about 14 hours on one single FPGA, becoming the fastest implementation to our knowledge. In parallel, we evaluated the possibility of a cryptanalytic time-memory tradeoff using distinguished points. The original idea from Hellman (1980) has never been implemented. We performed first experimental results and designed a machine that can break a 40-bit DES in about 15 seconds, with a high success rate (72%), using one PC. An exhaustive search of the key on the same PC would have taken about 50 days.
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Gael, R., & Francois-Xavier, S. (2002). FPGAs as cryptanalytic tools. 11th IEEE Mediterranean Electrotechnical Conference (IEEE Cat.No.02CH37379), p. 209-214. https://doi.org/10.1109/MELECON.2002.1014560