Total gamma dose characteristics of CMOS devices in SOI structures based on oxidized porous silicon

Bondarenko, VP;Bogatirev, YV;Colinge, JP.;Dolgyi, LN;Yakovtseva, VA;et.al.
(1997) IEEE Transactions on Nuclear Science — Vol. 44, n° 5, p. 1719-1723 (1997)

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  • Bondarenko, VP
    Author
  • Bogatirev, YV
    Author
  • Colinge, JP.
    Author
  • Dolgyi, LN
    Author
  • Yakovtseva, VA
    Author
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Abstract
The electrical characteristics of complementary metal-oxide-semiconductor (CMOS) transistors and ring oscillators fabricated in porous silicon silicon-on-insulator (So) structures are presented before and after gamma irradiation; P-channel SOI/MOS transistors exhibit a front-gate threshold voltage shift of -0.2 and -0.55 V after exposure to doses of 1 and 10 Mrad(Si), respectively, under floating bias conditions, which are different from worst case conditions. For n-channel transistors the corresponding values are -0.1 and -0.2 V. The additional bottom and sidewall Bf ion implants with a dose df 2 x 10(13) cm(-2) are found to be effective to prevent leakage current along the n-channel transistor bottom and sidewalls. SOI/CMOS ring oscillators present a 40% higher speed in comparison with the same bulk CMOS devices and continued stable operation under a supply voltage of 3-5.5 V, for gamma irradiation up to 10 Mrad(Si), and an operating temperature ranging from 77 to 400 K.
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Bondarenko, V., Bogatirev, Y., Colinge, JP., Dolgyi, L., Dorofeev, A., & Yakovtseva, V. (1997). Total gamma dose characteristics of CMOS devices in SOI structures based on oxidized porous silicon. IEEE Transactions on Nuclear Science, 44(5), 1719-1723. https://doi.org/10.1109/23.633424 (Original work published 1997)