A low loss semiconductor substrate
(2023)
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- Abstract
- (en) A substrate (1) according to the invention comprises a base substrate (2), a dielectric layer (3), a trap-rich layer (4) on the dielectric layer, and a crystalline semiconductor layer (5) on the trap-rich layer. The dielectric layer (3) may be a stack of multiple dielectric sublayers formed of the same dielectric material or formed of two or more different dielectric materials. The substrate of the invention is suitable for epitaxially growing on the surface of the crystalline semiconductor layer (5) one or more layers (6,7,8) of a compound semiconductor. The preferred application is the growth of a stack of layers of III-V material with one or more upper layers of the stack being suitable for processing in and/or on said layers a number of semiconductor devices such as transistors or diodes. The position of the trap-rich layer (4), between the dielectric layer (3) and the crystalline semiconductor layer (5), enables the neutralization of a parasitic surface conductive layer at the interface between the crystalline layer (5) and the compound layer or layers (6,7,8), and of an additional PSC layer caused by a direct contact between the crystalline layer (5) and the dielectric layer (3). The invention is equally related to methods for producing the substrate of the invention.
- Affiliations
Citations
Parvais, B., Yadav, S., Zhao, M., & Cardinael, P. (2023). A low loss semiconductor substrate. https://hdl.handle.net/2078.5/238498