Bias effects on RF passive structures in HR Si substrates

(2006) 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems — Location: San Diego, CA, USA (18.January.2006)

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Abstract
This work addresses the issue of parasitic conduction at the substrate surface in high resistivity (HR) SOI and oxidized bulk wafers. Surface conduction is related to the presence of free carriers at the SiO/sub 2//Si interface and is known to cause severe substrate resistivity degradation. Its impacts on RF losses of coplanar waveguides, substrate crosstalk properties and on the quality factor of spiral inductors are presented and discussed.
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Lederer, D., & Raskin, J.-P. (2006). Bias effects on RF passive structures in HR Si substrates. In Drayton, R.F.; (ed.), 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RFSystems (IEEE Cat. No.06EX1204) (p. 4 pp.). IEEE. https://hdl.handle.net/2078.5/231162