Underlap channel UTBB MOSFETs for low-power analog/RF applications
(2009) 2009 10th International Conference on Ultimate Integration on Silicon — Location: Aachen, Germany (18.March.2009)
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- Abstract
- In this work, we report on the significance of underlap channel architecture in Ultra Thin Body BOX (UTBB) fully-depleted (FD) SOI MOSFETs to improve analog/RF performance metrics. It is shown that at lower current levels and shorter gate lengths, underlap UTBB MOSFETs can achieve significant improvement > 1.5 times in key analog/RF metrics over devices designed with conventional S/D architecture. Analog/RF figures of merit are analyzed in terms of spacer-to-straggle ratio (s/ sigma ), a key parameter for the design of underlap devices. Results suggest that underlap S/D design with s/ sigma ratio of 3.3 is optimum to enhance analog/RF metrics at low current levels (< 60 mu A/ mu m). The present work provides new viewpoints for realizing future low-power analog devices/circuits with underlap UTBB FETs.
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Citations
Kranti, A., Burignat, S., Raskin, J.-P., & Armstrong, G. A. (2009). Underlap channel UTBB MOSFETs for low-power analog/RF applications. 2009 10th International Conference on Ultimate Integration on Silicon, p. 173-176. https://doi.org/10.1109/ULIS.2009.4897564