IMAGINE: An 8-to-1b 22nm FD-SOI Compute-In-Memory CNN Accelerator With an End-to-End Analog Charge-Based 0.15-8POPS/W Macro Featuring Distribution-Aware Data Reshaping

Kneip, Adrian;Lefebvre, Martin;Maistriaux, Pol;Bol, David
(2025) IEEE Transactions on Circuits and Systems for Artificial Intelligence — Vol. 2, n° 3, p. 222-235 (2025)

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  • Kneip, Adrianorcid-logoEEMCS Department, Delft University of Technology, Delft, CD, The Netherlands
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  • Lefebvre, Martinorcid-logoEEMCS Department, Delft University of Technology, Delft, CD, The Netherlands
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  • Maistriaux, Polorcid-logoICTEAM Institute, UCLouvain, Louvain-la-Neuve, Belgium
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  • Bol, DavidUCLouvain
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Abstract
Charge-domain compute-in-memory (CIM) SRAMs have recently become an enticing compromise between computing efficiency and accuracy to process sub-8b convolutional neural networks (CNNs) at the edge. Yet, they commonly make use of a fixed dot-product (DP) voltage swing, which leads to a loss in effective ADC bits due to data-dependent clipping or truncation effects that waste precious conversion energy and computing accuracy. To overcome this, we present IMAGINE, a workload-adaptive 1-to-8b CIM-CNN accelerator in 22nm FD-SOI. It introduces a 1152×256 end-to-end charge-based macro with a multi-bit DP based on an input-serial, weight-parallel accumulation that avoids power-hungry DACs. An adaptive swing is achieved by combining a channel-wise DP array split with a linear in-ADC implementation of analog batch-normalization (ABN), obtaining a distribution-aware data reshaping. Critical design constraints are relaxed by including the post-silicon equivalent noise within a CIM-aware CNN training framework. Measurement results showcase an 8b system-level energy efficiency of 40TOPS/W at 0.3/0.6V, with competitive accuracies on MNIST and CIFAR-10. Moreover, the peak energy and area efficiencies of the 187kB/mm 2 macro respectively reach up to 0.15-8POPS/W and 2.6-154TOPS/mm 2 , scaling with the 8-to-1b computing precision. These results exceed previous charge-based designs by 3-to-5× while being the first work to provide linear in-memory rescaling. Index Terms-Computing in-memory (CIM), SRAM, charge-based dot-product (DP), convolutional neural networks (CNNs), analog batch-normalization (ABN), hardware-aware training, 22nm FD-SOI.
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Kneip, A., Lefebvre, M., Maistriaux, P., & Bol, D. (2025). IMAGINE: An 8-to-1b 22nm FD-SOI Compute-In-Memory CNN Accelerator With an End-to-End Analog Charge-Based 0.15-8POPS/W Macro Featuring Distribution-Aware Data Reshaping. IEEE Transactions on Circuits and Systems for Artificial Intelligence, 2(3), 222-235. https://doi.org/10.1109/tcasai.2025.3576323 (Original work published 2025)